Zero elimination
A 0 excludes all four surrounding edges immediately.
A focused 90-level path from compact 5×5 boards to long-form 15×15 loops. Hints explain a deduction from your current marks; Daily and Practice stay reproducible, and assisted help never masquerades as a clean solve.
Draw one continuous loop without guessing. V0.231 explains the next forced edge, shows live structural evidence, scales through 15×15, and keeps help-assisted runs separate from clean solves.
Draw one continuous closed loop. Number clues count surrounding loop edges.
Slitherlink
Local deductions come from clue quotas, dot degree and premature-loop prevention. When those go quiet, smaller boards can use an exact constraint proof; every shipped source is pre-certified unique.
The next named deduction appears here with a reason, not as an unexplained answer reveal.
If a clue already has its required line count, every other side is excluded. If every remaining open side is needed, all are forced into the loop.
A used dot must have exactly two loop segments. One line plus one open exit forces that exit; two lines exclude every other edge.
If an edge would seal the current component before the whole puzzle is complete, that edge is excluded.
Practice spans 5×5, 6×6, 7×7, 10×10, 12×12 and 15×15 at Easy, Medium and Hard. All source puzzles are unique-solution certified before shipping.
Monday starts at 5×5, midweek reaches 7×7–10×10, Saturday uses 12×12 and Sunday offers a 15×15 long-form Daily. Past dates remain replayable.
Hint, Verify state, mistakes, Check, Undo, Redo and Restart mark the run Assisted. Tool choice, dragging and scrolling do not.
A 0 excludes all four surrounding edges immediately.
A 3 in a corner forces both boundary edges into the loop.
The 0 blocks the shared side, forcing all three other sides of the 3.
Side-by-side or stacked 3s force the two outer rails parallel to their shared side.
Every touched dot needs exactly two loop edges, which forces exits and blocks branches.
Reject an edge that would close a smaller loop before the whole circuit is complete.
When local logic is silent, the exact model or pre-certified unique source can prove a forced edge.